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by adrian_b
15 days ago
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Their main architectural choice was not about "RISC" or "ARM" but it was choosing "Brainiac" over "Speed Demon", i.e. setting the goal to execute a great number of instructions per clock cycle at a moderate clock frequency, instead of executing a moderate number of instructions per clock cycle at a high clock frequency (the latter variant results in lower fabrication costs, which is why other companies were reluctant to pursue the same choice as Apple). A high IPC is much easier to achieve when the instructions have a fixed-length encoding, so this RISC principle followed from their main choice. |
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