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by tverbeure
22 days ago
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That’s so cool! Reading these comments first, I assumed you were using a variant of Spartan 6 LVDS TDC trick which allows up to 200 Msps rates. (https://sps.ewi.tudelft.nl/pubs/Homulle15fpga.pdf) But this is a really interesting use case as well, and something that could be used for a 16 channel logic analyzer with analog recording support like the Saleae Logic 16 Pro, but without expensive ADC from Analog Devices. |
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