[ylyn]

You assert that ECC RAM being necessary for ZFS is just a myth but provide no justification for why that is untrue.

Is it not the case that if you don't have ECC memory, ZFS could end up writing a checksum that does not match the data if you get a bitflip in just the right (wrong) spot?

[Confiks]

Yes, indeed. ECC RAM is better than non-ECC RAM, also for ZFS.

The myth, popularized by a notorious thread on the TrueNAS forums [1], is specifically that ZFS requires ECC RAM, and will do worse than other filesystems without it, because scrubbing will multiply a single bitflip into a failed pool.

A ZFS core developer says that that isn't the case [2]. Here's some more reasoning [3], also about many other myths.

[1] https://www.truenas.com/community/threads/ecc-vs-non-ecc-ram...

[2] https://news.ycombinator.com/item?id=18480016

[3] https://kldload.com/zfs-wiki/myths

[StrangeWill]

The only hangup with the myth "debunking" is that the point is that the corruption doesn't happen to a per-disk buffer, but to the in-flight data before it's persisted to your stripe.

Which means all copies of the data will be corrupted. This can be anything from an irrecoverable file to complete filesystem corruption.

But generally, yeah, not any more dangerous than any other filesystem, and ECC used to be cheap so it was a no-brainer, you should have backups anyway TBH if we're being honest about storage resiliency.

What has been debunked is the "scrub of death" issue, on a scrub a bad bit flip would cause an error, which would be copied over with good data -- well it was technically good before. It would be statistically difficult to have a fault on a read, then a clean read, then a second bit flip destroying the data.

[dijit]

Usually if you’re using a NAS you don’t want to lose data, ZFS is not significantly more sensitive than everything else.

But everything is actually quite sensitive.

We’ve accepted lack of ECC because Intel decided it would be a product line differentiator, and serious customers who didn’t want random crashes or to lose data would buy chips with ECC.

It’s actually less of an issue these days because DDR5 has (by spec) some in-line ECC; won’t help with multi-bit errors but its an improvement on what came before.

[layer8]

DDR5 on-die ECC is to achieve acceptable yields in the face of denser process nodes that decrease the reliability of RAM cells. It’s not clear how much of an improvement that is to what we had before, other than allowing for higher RAM speeds. It doesn’t replace side-band ECC.

[toast0]

> We’ve accepted lack of ECC because Intel decided it would be a product line differentiator, and serious customers who didn’t want random crashes or to lose data would buy chips with ECC.

AMD has been allowing ECC on lots of regular hardware for a long time.

People don't tend to buy ECC for desktop use because it costs significantly more (used server ram is/was often cheap... but it often doesn't work in desktop boards), and the performance specs are poor.

My home servers are mostly retired desktops, so they get my old desktop ram and I don't want to pay premium prices for jedec speed ecc ram on my desktops, thanks.

Since DDR5 doesn't include reporting on bit errors (afaik), it likely means much fewer single bit errors, but most experienced errors will be multi-bit. Although, I dunno what proportion of bit errors is on the ram chips and what's on the bus... there's no protection from bus errors.

If there were reporting, you could replace chips with high error rates, but without reporting you'll keep running them until they fail enough to notice.

[Dylan16807]

> AMD has been allowing ECC on lots of regular hardware for a long time.

Often unsupported or untested by the motherboard manufacturer, because the precedent set quite a while ago has stood so strongly.

> because it costs significantly more [...] and the performance specs are poor

Because it's niche. If a large share of the desktop market was using ECC memory, the extra cost would have been 10-12%, and a typical kit would push the clocks and timings at least as much as non-ECC memory.

> Since DDR5 doesn't include reporting on bit errors (afaik), it likely means much fewer single bit errors, but most experienced errors will be multi-bit. Although, I dunno what proportion of bit errors is on the ram chips and what's on the bus... there's no protection from bus errors.

Yeah that sucks. I'm really hoping that DDR6 standardizes a light form of end to end ECC. (Bursts are 24 bits wide and 24 bits deep, so on top of the 512 bits of payload there's a bunch of extra bits that can be used for ECC. If memory chips would just store 4 extra bits per 128, that's enough for reasonable ECC on a per-burst basis.)

[toast0]

> the precedent set quite a while ago has stood so strongly.

I wasn't really around for it, but I appreciate the early penny pinchers that developed fake parity ram. The IBM PC required a parity bit per byte?, but you could add an xor chip to calculate it at read and save out on the expensive ram chip.

I wouldn't mind paying a little more for ECC, what with the extra chip and a little more circuitry, but desktop ECC often starts at 50% more, which I'm way too cheap to pay for.

[Dylan16807]

My favorite parity trick was how the N64 was designed around ECC RAM chips but didn't bother using ECC, so it has a ninth bit at every address that the CPU ignores and the GPU uses as extra storage.

[sgt]

I know that LPDDR5 has ECC, and not just single bit AFAIK, but if you enable it you lose some memory capacity (the 128 bit bus minus 16 bit for ECC error correction, making it effectively 112 bits)

[magicalhippo]

Updated link to the post from Matt Ahrens here[1], which is one of the ZFS creators[2] not "just" a core developer.

[1]: https://arstechnica.com/civis/threads/ars-walkthrough-using-...

[2]: https://en.wikipedia.org/wiki/ZFS#2004%E2%80%932010:_Develop...

[vardalab]

Had it happen to my PBS backups running on ZFS without ECC just the other day. Turned out to be heat related, memory was fine but during long backups heat was causing bit flips.

[naturalmovement]

> You assert that ECC RAM being necessary for ZFS is just a myth but provide no justification for why that is untrue.

ZFS without ECC is no more risky than any other file system / software RAID without ECC.

As no one owes you an explanation, it would take you five seconds to Google this and discover:

1. It's been disproven, with one of the original ZFS developers chiming in.

2. The original source of the rumor was a forum post that somehow became canon.

[cormorant]

> five seconds to Google this and discover

...(after much longer) that it's a rabbit hole with nuance. https://news.ycombinator.com/item?id=18481910

[wpm]

What an incredibly rude comment