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by amirhirsch
30 days ago
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32 port Tx (vertical pancake beams) x 16 port Rx (horizontal pancake), something like 60 by 30 degrees. the entire thing used FPGA transceivers as one-bit DAC/ADC, Complementary Golay Code waveforms with one-bit correlation in the FPGAs (two VCU128s) -- digital logic was essentially the same as a binarized neural network, I squeezed a ton of popcnt performance out of those chips using both DSPs and LUTs |
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(VCU128s are relatively large, HBM equipped FPGAs for people not aware)