[GeekyBear]

InFO combines chiplets, but does not do so by bonding multiple chiplets directly to a silicon interposer as CoWoS does.

The article compares CoWoS to InFO.

> CoWoS uses a passive silicon interposer—etched with thousands of fine interconnects—that sits between the active dies and the package substrate. This interposer provides high-density connections between chiplets and supports memory integration, most notably High Bandwidth Memory (HBM) stacks.

It also mentions that CoWoS is the tech used to build Nvidia's high end AI accelerators.

> AI Accelerators: Nvidia H100, B100 (HBM3 via CoWoS)

Apple is taking a tech that has previously only been used in very high end enterprise applications and is using it to make consumer SOCs starting with this years iPhone.

[monocasa]

You're calling it CoWoS, but also said "this shift eliminates the need for silicon interposers", but also said "CoWoS uses a passive silicon interposer"

Something's got to give here. I think it's your original article that's wrong, and it's poorly trying to describe InFO-M.