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by byb
38 days ago
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Author here: thank you for this deep dive. I saw peaks of 5.9 Mbps, it might be possible to increase throughput by allocating more memory. The link between the rp2040 and Infineon Wi-Fi device is 31.5 Mb/s. It might be possible to push that out over PIO to an external USB 2.0 PHY. Apparently the Wi-Fi device is capable of higher speeds. Who knows what will be the limiting factor. I'll leave it to someone else to experiment, my focus was the stock hardware without any modifications. |
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I doubt you will be able to achieve USB HS via a ULPI PHY without an FPGA tunneling the USB SIE for you and handling the tight turnaround requirement (in which case, you might as well give it the entire MAC workload or just use an MCU with an integrated HS PHY.)
The ULPI clock is a 60MHz free-running PHY-sourced signal (typically - some PHYs allow MAC-sourced clocks and this would likely be a little easier), the PHY is entirely in control of when the MAC can transmit (DIR pin), and the protocol is unforgiving from a timing standpoint.