|
|
|
|
|
by cpldcpu
1 hour ago
|
|
I had Opus 4.5 design an LLM inference engine in verilog, including firmware and automated verification a while ago: https://github.com/cpldcpu/smollm.c It's of course far from optical. But lowering the implementation through the abstraction levels turned out to be extremely powerful. |
|
I have a spare Tang Nano 9k but I don't feel confident about blindly asking Claude to vibecode me a solution and still would like to have at-least a basic level of understanding.