[Aurornis]

The hardware description languages (HDL) used in chip development are like programming languages. The existing models understand them and can do a lot with them. You don’t need to have separate, specialty models designed for this work to use LLMs in chip design workflows.

Design verification also involves a lot of traditional programming which benefits from LLMs.

So it’s not meaningless at all. You could download some of the open source chip design software today and the LLMs could even help you get started on your own tiny chip if you are so interested.

[knicholes]

I tried making a button using Claude entirely (including the 3D printed enclosure) and it effed up pretty hard with the traces and the header spacing. The project was a big red arcade button that plays the "ah-my-groin.mp3" when pushed (from Simpsons). It did cool work on saving battery life, and the 3d enclosure was awesome, but yeah, I'm convinced I'd have to do another version or two of the custom chip until it came back right. I used a Blender MCP for the 3d modeling. I used a KiCAD MCP server for the chip design/validation.

I think we're not there yet. I've been meaning to look at this flux.ai to see if it has the prompts/workflow worked out better than what I was able to cobble together in a few hours. Maybe Alteryx's MCP server would have been better. I'll try that this weekend for another board I've got.

[Aurornis]

> I tried making a button using Claude entirely (including the 3D printed enclosure) and it effed up pretty hard with the traces and the header spacing.

PCB design and 3D CAD design are different topics.

Hardware Description Languages are closer to programming languages than CAD. Look at some Verilog to get an idea - https://en.wikipedia.org/wiki/Verilog

[knicholes]

Right. KiCAD for PCB design. Blender for 3D CAD. Oh, are you saying I should have used something other than the KiCAD MCP server for better results?

[VorpalWay]

Designing circuit board and 3D models (even using something like OpenSCAD) is a very spatial process today. You are dealing with coordinates one way or another.

This is very unlike how FPGA and (I assume) ASIC is done. That is more like a traditional programming language but everything happens all at once (no sequence of statements outside tests, if you need that you have to write a state machine yourself). You define logic expressions between signal, add stateful latches, etc. But you never specify the physical layout.

Instead you feed your description to a tool that acts a constraint solver/optimiser that computes the layout for you (this is for FPGAs called synthesising IIRC, it is akin to a compiler). Typically quite slow, even for small circuts like we did at university it took minutes, and for large circuits it might easily days.

Now, this raises the question, what if you design a PCB net list using AI, but then use traditional autorouting and layout? I believe that can also be done, but I have no experience designing PCBs, so I don't know how well it works.

[quadrature]

VHDL is not a language for spatial design. Its more akin to a programming language with circuit semantics.

[dcrazy]

They’re saying that VHDL is an entirely different concept than physical modeling.

[giancarlostoro]

You're comparing apples and oranges.

[cwillu]

Meta: can we not downvote people who are clarifying what they're saying and asking questions, even if they're wrong about something, if the content isn't otherwise objectionable?

[baq]

I didn’t downvote, but the OP is either a troll or someone who doesn’t want to notice he doesn’t know what he’s talking about. Either way we want less of that on HN.

[knicholes]

I'll acknowledge that I don't know what I'm talking about. I really appreciated the clarity! Surely you find value in knowing that creating your own custom chips is almost doable by someone who doesn't know what they're talking about! (also, I am a troll, but in this case, just clueless)

[tamimio]

One (kicad) make the board, the other (blender) make the casing for it. Both are “hardware” but is electronics and the other is mechanical. Electronic one AI can do a good job, I can’t wait for it to fully built the whole circuit for you based on your specs.

[rpcope1]

PCB layout is an art, and doesn't seem to map well to LLMs (I tried for shits and giggles recently). Claude in general, kind of like code, does a lot of redundant belt and suspenders stuff in the schematics it generates (if it can generate them at all). It's one of those things that's really not there yet outside of the simplest designs.

[ses1984]

The question isn’t whether or not they employed a particular tool, the question is how big of an impact did it have.

[nradov]

Most HDL code is locked up behind corporate firewalls and not available as training data. While LLMs can handle it to an extent there's a lot of room for improvement. I'll bet that OpenAI and their competitors are racing to license this IP from major hardware vendors in order to compete in the chip design vertical.

[tonfa]

Does it work better when using compiler based ecosystem (e.g. https://github.com/llvm/circt)

[doxeddaily]

This reminds me of the dude on youtube building a chip fab in his shed.

[IshKebab]

> The existing models understand them and can do a lot with them.

In my experience they are not especially good at SystemVerilog. There's a lot of knowledge about it that is locked behind paywalls and it's very niche.

My guess is the "from scratch" here is quite the exaggeration. Otherwise why did they need Broadcom?

[petra]

There was something similar to c\c++ for hardware design. Maybe it could work better with LLM's with some training?

[aseipp]

Not having a free toolchain that can actually handle the real language has probably been pretty bad on the downstream public knowledgebase. Hopefully Verilator can eventually close that hole, and there can be more high-quality designs and codebases incorporated into future models. Claude is at least good enough to write SV that triggered a compiler crash or two. :)

[whynotminot]

Doesn’t Broadcom bring a lot more to bear here than just Verilog? Including relationships with the actual fabricators.