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by monocasa
19 days ago
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Poorly designed or managed chips can reach the point that hot spots in the silicon literally melt, which happens at ~1400C. Thermodynamics sitting on an insulator (relative to the metal portions of the chip at least) on very small scales is very weird and can reach wild spot temps. That's why chip thermals is its own whole subfield of physical design. |
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Chips have the advantage that the workings are right at the surface, mere microns from it. So the heat can easily get out. The power density in that thin surface layer can be very high. Perhaps similarly, the power density of a PV cell can be very high, if one just looks at the active layer where light is being absorbed. In CdTe this layer is < 1 micron thick. The energy delivered over the life of the cell per atom in this layer can approach that of nuclear reactions.