[patrick-ghetea]

Hi Benji, sorry for the late reply. I saw you were really interested in it, and I hope my comment answers your questions. Strict macro checking (using the 'define' keyword) and register validation (including case checks to ensure consistent coding) will be implemented in version 2.0. Right now, it doesn’t strictly throw an error if a line is wrong in all contexts, but in the final assembly, the invalid lines won’t compile anyway. You’re right, and I’ll definitely include such checks in Riscrithm v2.0. Also, if you want to check out my new release, Riscrithm v1.1 is now available on GitHub.

For your second point, yes, RISC-V assemblers sometimes transform written assembly into their equivalent instructions (e.g., 'mv foo, bar' becomes 'addi foo, bar, 0'). Riscrithm uses normal RISC-V syntax (like 'ret' or 'nop' keywords rather than the true on-metal command). This doesn’t mean we lose assembly’s flexibility—commands are always as close to the metal as possible. Keywords like 'swap' of course expand into more lines of code, but these are always clear expansions the developer can understand and verify anytime. The goal of Riscrithm is to make writing assembly simpler and cleaner, which is why I focus on mapping instructions clearly to their true on-metal equivalents. If you want to see which instructions expand into what, you can check the Developer Manual, which now includes four Riscrithm v1.1 examples with their corresponding assembly. Again, great points and comments—I really appreciate them!