[Polizeiposaune]

Details of the errata from a comment in the diff:

"Write both dist bytes as a single 2-byte store. This avoids the `movb %ch, [mem]` instruction pattern (store from high-byte register alias) that LLVM otherwise emits when dist arrives as a wide register. That pattern triggers the Intel Raptor Lake CPU errata, causing silent 2-byte stores that corrupt the adjacent `len` byte."

[whadawha]

How did this get past validation at Intel?

This is worse than https://en.wikipedia.org/wiki/Pentium_FDIV_bug

[bri3d]

There's another blog post going into more depth about the issue here: https://fgiesen.wordpress.com/2025/05/21/oodle-2-9-14-and-in... where they speculate that it seems to relate to both other clock-related instability on specific Raptor Lake parts and possibly the overarching voltage control problems that the platform had early on; I can't tell entirely from the bug reports whether the behavior reliably reproduces on 100% of Raptor Lakes but the indicators I'm reading point to that it doesn't. It is concerning that Intel didn't get back to Mozilla about it though, since it's certainly a lot more than a one off.

[eigenform]

Well, the FDIV bug is simpler. AFAICT this whole thing is tied up in the relationship between DVFS, silicon aging, and being able to have guarantees about clock reliability. That seems hard to reason about when you give BIOS vendors and users the ability to do over-volting/over-clocking (and of course, it's worse when you are maybe relying on all this in certain situations to try and approach parity with other hardware vendors who are taping out machines on CMOS processes that are more mature than yours).

[userbinator]

"validation? what validation?"

https://news.ycombinator.com/item?id=27244941

Edit: you should probably read the article I linked first.

[moffkalast]

Common Raptor Lake L, add it to the pile of oxidation and overvoltage faults. This has to be the most faulty generation in Intel's entire recent manufacturing history.

[happycube]

It's the Alder Lake MAX. Originally decent design just pushed too far.

[dmitrygr]

modifying source to avoid an assembly isntr isn't a fix... this need a compiler fix most likely, or a microcode fix, if possible.

[whadawha]

Anyone have knowledge of whether microcode can be patched on consumer grade Intel CPUs?

[altairprime]

https://github.com/intel/intel-linux-processor-microcode-dat...

  $ echo 1 > /sys/devices/system/cpu/microcode/reload

Hot-swappable, even. TIL!

[xxs]

of course, it's hot-swap material, the microcode is 1st deployed by the bios, then the OS can apply changes as well.

Just that it's writable by $ (not #) feels awkward.

[altairprime]

> Of course it’s hot-swap

Microcode updates like this didn’t exist when I first learned sysadmin, so I guess I don’t take such things for granted, sorry!

[bri3d]

Yes? It is regularly; both the firmware or the OS can deliver updates depending on configuration. The Raptor Lake CPUs in question have gone through an enormous number of microcode revisions already due to quite famous voltage scaling issues; it's unclear if this errata is fallout from or related to a similar root cause or just another issue with the processor.

[__patchbit__]

At boot time, the following package provides the latest Intel CPU microcode data files on NetBSD.

  sysutils/intel-microcode-netbsd

dmesg shows

  cpu 0: ucode 0xf0->0xf6
  cpu 1: ucode 0xf0->0xf6

[throwaway2037]

Why is this downvoted? (At the time of writing, the text is grey, so it has at least a few downvotes.)

This is a good question. As others have noted below, yes, and sometimes you can see kernel logging on start-up when the microcode is loaded.

[wtallis]

It's a dumb question, because it's in reply to a comment that already implies the answer, and it's trivial to find an answer online in less time than it takes to post that question and wait for someone to supply an answer.

The subject of CPU microcode update mechanisms is an interesting and relevant topic, but such a shallow, low-effort question is not a good way to promote interesting discussion on that topic.