[DoctorOetker]

I know the differences between SRAM, DRAM, ...

I asked for evidence different people keep feeding me opposite stories: one insists its not fab capacity but wafer competition, with a recent article claiming HBM3E takes 3 times as much wafer area per bit than LPDDR5X. Others tell me the complete opposite: its fab capacity, not wafer shortage.

Do we have citable references to ground either set of claims?

[sowbug]

I believe those are two ways of describing the same thing. If you're able to book some fab capacity, that means you get to decide what the fab does with the next wafers in the queue.

From your sibling comment, I think you're interpreting the 3x HBM stat as contributing to making wafers scarce. It's more that the next wafer to be processed in a fab is especially precious, making the opportunity cost larger. The beach sand remains plentiful.

[DoctorOetker]

so the bottleneck is the fab, again