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by wahern 34 days ago
AFAICT[1] the latest generation of SpaceX Starlink satellites use AMD Versal XQR SoCs, which are built on a 7nm process with components like the main processor (dual-core ARM Cortex A-72) and memory (DDR4) clocked in the gigahertz, not megahertz, range.[2] At least some of these SoCs models (presumably the lower-clocked ones) are certified for geosynchronous orbits, not just low-earth orbits.

[1] https://www.pcmag.com/news/amd-chips-are-powering-newest-sta...

[2] https://docs.amd.com/r/en-US/ds955-xqr-versal-ai-edge/Genera...

2 comments

Just to put in my 2 cents as someone tangential and sometimes a little too close for comfort for the field: with FPGAs (aka the half of this SoC doing the real work) there's often a lot of work that goes into radiation tolerance and hardening which are different things. It's not like you can just put the chip in space and be done. You have to do things like scrubbing the "bitstream" regularly for errors, triple-module-redundancy (aka cut yourself to 1/3rd of the chip's capacity), and other stuff.
What is the designed lifespan of a Starlink satellite?
I don’t think the flash storage would keep data integrity for that long without a lot of redundancy. Also, processing capacity would be limited as well. Is there a problem that can be solved with a LEO server that can’t be better solved with the same amount of money sitting in a datacenter somewhere?
Pumping the SpaceX IPO.
$20 FPGAs have single event upset modules built in these days. You really think it's that hard to make a 2kB bootloader triple or quadruple redundant?