[sylware]

kernel/user space context switching, in high performance context has to be seriously evaluated.

And this is very dependent on the hardware programming interface of the devices.

Look at AMD who is investigating hardware user-level queues for their GPUs (dunno if this is possible because of VMID stuff)

[ajross]

> kernel/user space context switching, in high performance context has to be seriously evaluated.

Of course. But that's true for all userspace solutions too, and there are many options for async APIs (io_uring et. al.) which work to address that.

The point is that you want the IP stack (or whatever) to be passing stuff around on unix domain sockets for every packet. It's that you want it running in its own memory domain.