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by lynguist 54 days ago
Indeed!!

MIPS - $zero

RISC-V - x0

SPARC - %g0

ARM64 - XZR
3 comments
classichasclass 54 days ago
PowerPC: "r0 occasionally" (with certain instructions like addi, though this might be better considered an edge case of encoding)
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Findecanor 54 days ago
On 64-bit ARM, the same register number is XZR in some instructions and the stack pointer in others.
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matja 54 days ago
Alpha: r31, f31
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