[phire]

Lakemont doesn't actually share much history with the 486SX.

Hard to tell the exact ancestry of Lakemont. It might be a from-scratch scalar design that just so happened to target the i586 instruction set, but with a 486 style 5-stage scalar pipeline. Or it might be forked and hacked down from something more modern, like Atom.

It's a very configurable core. There are versions with just the FPU and NX bit turned off. MCU variant goes further, turning off segmentation, the BCD/string instructions, xchg and the AF/PF flags.

Intel did a talk on the MCU core at hot chips [1], which gives you a better idea of how they made/configured it (but doesn't give much insight into where the original Lakemont core came from).

But modern hardware design acts kind of like software these days. They write verilog code, they fork designs off, they share code or entire modules between teams. The code is often configurable. And then they throw the code + configuration at automated tooling which spits out reasonably good gate layouts.

[1] https://www.youtube.com/watch?v=LHYBPhKRlVM

[userbinator]

They reused the diagrams (and much of the text) from the 486 era for the Quark documentation, which I think wouldn't happen if they weren't reusing the core design. I remember an early datasheet had "QuarkDX" show up a few times.

[phire]

CPU documentation often lies.

The docs are written by completely different Technical Writing teams, who don't always fully understand the design they are documenting. They are usually correct enough for someone using them normally, but I've learned that relying on manuals to actually understand the underlying implementation (or its history) is problematic.

So reuse of 486 documentation doesn't prove anything. IMO it's more likely that the Technical Writing team saw how close the design was to the 486 and decided to re-use that documentation as the starting point.