|
|
|
|
|
|
by jareklupinski
76 days ago
|
|
|
for resolution, i'm only limited by whatever the bus company is throwing away that day ;) but i'd love to come up with an easy-to-produce design that can work per-pixel for arbitrary spacing yup after seeing #2 at a museum and learning about the chemistry needing to keep it running, i started looking for something like #1, but i'm not able to get any PIN diode circuit properly reporting events with consistency compared to my GM tubes :( #3 sounds fun! i'd like to turn this into something i can open-source and hang on a wall, emitting x-rays might make it a hard sell :P after reading about https://en.wikipedia.org/wiki/Single-event_upset#SEUs_and_ci... , i'm wondering if it's possible to use a suitably dense FPGA in a complicated enough design that any failure must be due to cosmic effects? monitoring ECC might not be enough https://en.wikipedia.org/wiki/ECC_memory#Concept |
|
|
Do you have access to a high bandwidth oscilloscope? do you observe the expected exponentially decaying pulses? Sound like you could debug your circuit to find out what is happening.
For higher energies on would want to use a thicker intrinsic region, one approach I have considered would be to use a distant aperture, so that the direction of incoming rays is known, and then tilt the photodiode so that the rays can experience a much longer path in the intrinsic region (so that when a photon generates a high energy electron, the stopping length can be attained without clipping / aliasing the energy resolution as much). Basically tilt the photodiode so that its plane is closer to parallel (or exactly so). There is a trade off between cross section (fewer events) and maximum energy measurable, one can compensate for the lower cross section by having more photodiodes.
all 3 proposals would be passive, including #3, so it wouldn't emit X-rays, just detect them and build up a self-consistent picture that explains the observation statistics for each event (with that energy and time/orientation of the silicon wafer).