[LeFantome]

First, x86-64 also has “extensions” such as avx, avx2, and avx512. Not all “x86-64” CPUs support the same ones. And you get things like svm on AMD and avx on Intel. Remember 3DNow?

X86-64 also has “profiles” which tell you what extensions should be available. There is x86-64v1 and x86-64v4 with v2 and v3 in the middle.

RVA23 offers a very similar feature-set to x86-64v4.

You do not end up with a mess of extensions. You get RVA23. Yes, RVA23 represents a set of mandatory extensions. The important thing is that two RVA23 compliant chips will implement the same ones.

But the most important point is that you cannot “just use x86-64”. Only Intel and AMD can do that. Anybody can build a RISC-V chip. You do not need permission.

[sidewndr46]

It's actually worst because intel is introducing APX now as well.

[NetMageSCW]

>Anybody can build a RISC-V chip. You do not need permission.

No, anybody can’t build a RISC-V chip. That’s the same mistake OSS proponents make. Just because something is open source doesn’t mean bugs will be found. And just because bugs are found doesn’t mean they will be fixed. The vast majority of people can’t do either.

The number of people who can design a chip implementation of the RISC-V ISA is much, much smaller, and the number who can get or own a FAB to manufacture the chips smaller still. You don’t need permission to use the ISA, but that is not the only gate.

[craftkiller]

I think it was clear that they were saying anybody is permitted to build a RISC-V chip, not that anybody has the skills.

> The number of people who can design a chip implementation

Thankfully you don't have to start from scratch. There are loads of open source RISC-V chip implementations you can start from.

> get or own a FAB to manufacture the chips

There is always FPGAs and also this:

https://fossi-foundation.org/blog/2020-06-30-skywater-pdk

[LeFantome]

> anybody can’t build a RISC-V chip

Yes, they can. My point is that nobody needs to give you permission. You can pretend that does not matter but China is about to educate us about what this means rather dramatically in the next few years.

And India is building RISC-V chips. And Europe is building RISC-V chips. Tenstorrent started in Canada (building RISC-V chips).

> the number who can get or own a FAB to manufacture the chips

Really? Almost nobody owns fabs and yet there are a multitude of chip makers. Getting access to a fab requires only money. It has nothing to do with the ISA or your skills. TSMC can make RISC-V chips just fine and already do. In some places, like China, RISC-V chips may be at the front of the line.

> The number of people who can design a chip implementation of the RISC-V ISA

Anybody can build a RISC-V chip. Build one yourself: https://github.com/tscheipel/HaDes-V

Every electrical engineer is going to know how to design a RISC-V chip. But you could also be an intelligent garbage man and design a RISC-V chip in your spare time using only open source materials. You can even tape it out.

https://tinytapeout.com/

"But that is only a 32 bit microcontroller!", you might say. Sure. But the skills to build RISC-V are going to propogate. Of course, that does not mean that everybody in the world is going to figure out how to build chips. That is clearly not my point. They will still be built primarily by a select few. But that is not unique to RISC-V by any stretch. In fact, less so.

The hard part about building a chip from scratch is not the ISA. You think that a world-class engineer working with ARM64 or amd64 today cannot design a RISC-V chip? That is like saying a carpenter building oak cabinets lacks the skills to make them with maple.

And since it is the same amount of work to start fresh regardless of ISA, why not start with RISC-V?

Except you do not have to start fresh with RISC-V because there are many, and will be many, many more, open designs to study and start with. Here is a 64 bit chip that implements the very latest RISC-V vector extensions:

https://github.com/tenstorrent/riscv-ocelot

Which, by the way, means that although most won't, anybody can build a RISC-V chip.

The RISC-V world will look like ARM. Most chip makers will license the core design off somebody else. But there will be more of those "somebody elses" to choose from. And there will be more people who choose to design their own silicon. Meta just bought Rivos. What for do you think? And they did not have to talk to ARM about it.

[BoredomIsFun]

1. Yes, but most of the code would run on anything older than 2007. 20 years of stable ISA.

2. Also, fundamentally all modern CPUs are still 64-bit version of 80386. MMU, protection, low level details are all same.

[sidewndr46]

This isn't really accurate, lots of commercial software is now compiled for newer x86 64 extensions.

If you're using OSS it doesn't really matter as you can compile it for whatever you want.

[BoredomIsFun]

> lots of commercial software is now compiled for newer x86 64 extensions.

Almost all software I encountered - including Windows 10 and precompiled Debian 13 - needs only SSE4.2, essentially mid-2000s ISA. Intel produced until very recently (early 2020s) Celeron CPUs which did not even support AVX.

[sidewndr46]

People focus on AVX entirely too much, it is stuff like POPCNT that matters more. Which as you pointed out, is part of SSE4.2

[BoredomIsFun]

...which has been with us almost 20 years.

[sidewndr46]

Yet I still have regular conversations explaining "there is no way our customers are running on hardware that doesn't support this, where would they even be getting the hardware from, 2008?". I have a set of requirements in front of me requiring software to run on not only all Intel 64-bit chips, but also all Intel 32-bit chips.

[NetMageSCW]

No, you really can’t. For some OSS, on hardware that has an OS supported by that software, with a compiler that supports that target and the options you want, and in some cases where the OSS has been written to support those options, you can compile it. Otherwise you are just out of luck.

[sidewndr46]

I don't really understand your position here. Compiler availability isn't really that big of a deal, even on obscure or proprietary platforms. Why would there be "some cases where the OSS has been written to support those options"?