[lonetech]

I've not had the time to read up on Xeon Phi, but compared to the Tilera, the Epiphany is a considerably simpler processor. There's no MMU in the cores, instead of caches there is direct DMA control, and the on-chip network extends past the edges of the chip (that's all the I/O, there are no peripherals in the chip). It all adds up to something you can scale by mounting more of them on a board, assuming your task is sufficiently adaptable to a data flow (since the external bandwidth scales slower than the number of cores). It's not at a level where you can run a general purpose operating system with virtual memory and memory protection (though extending it for that would be fairly easy - perhaps Epiphany V?), nor does it (currently) run multiple threads per core, but this simplicity affords it a much lower power expense. A GPU may be more similar, as those tend to have prefetch operations and no memory protection, but they are designed to have huge bunches of threads doing the exact same type of work. They look like vector processors handling between 16 and 128 identical operations per control core (each a multiprocessor). Mainly the Epiphany is easier to program, but optimization is a different story (similar to place and route processes FPGAs need). It's a move toward a data and control flow granularity currently not available at a price for individuals. And to make it more useful, those individuals need to try things.