[u8080]

> lengthy errata doesn't mean anything

In STM32G0 for example, there is "SPIv1" peripheral which has very critical implementation bugs which can get SPI to completely stuck until reset by RCC.

There is very brief mention in STM errata about this, I had to dig up forums and dance up with SWD around this.

[5d41402abc4b]

Which G0 part is this? Can you point me to one of these forum posts?

[u8080]

Sorry, I was digging on that too much time ago and haven't saved any links. AFAIR, there is permanent busy state in certain conditions when functioning in SPI slave mode, unablility to reset TXFIFO/RXFIFO and some edge case with DMA and TXE/BSY when DMA failed and you don't know how many bytes are in RxFIFO.

[inferiorhuman]

Someone's in the Embassy matrix channel currently trying to figure out why the SPI driver is preventing the USB peripheral from enumerating on their G0…