[exmadscientist]

FPGAs need their "Arduino moment". There have been so, so, so many projects where I've wanted just a little bit of moderately-complicated glue logic. Something pretty easy to dash off in VHDL or whatever. But the damn things require so much support infrastructure: they're complicated to put down on boards, they're complicated to load bitstreams in to, they're complicated to build those bitstreams for, and they're complicated to manage the software projects for.

As soon as they reach the point where it's as easy to put down an FPGA as it is an old STM32 or whatever, they'll get a lot more interesting.

[willis936]

It's already happened, people just haven't realized. iCE40-UP5K costs a few bucks, needs minimal support circuitry, and is supported by FOSS toolchains (yosys). Fun packages like the pico-ice bring it all the way down to the entry-level arduino crowd. It just doesn't have the marketing mindshare.

[ithkuil]

A few times over the past decade I wanted to start with a side project where I design and develop a CPU.

I bought a relatively cheap artic 7 board with 33kLUT and whatnot which I know people have used to implement risc-v implementations on.

But then I always lost my patience on the tooling.

For a side projects these days I need something comfortable. Something that that I can easily switch my context to without having to juggle VMs and installing unfriendly tools and use horrible IDEs

[nrhrjrjrjtntbt]

Funny enough it is available on an UPDuino board: https://tinyvision.ai/pages/the-upduino

[rramadass]

> FPGAs need their "Arduino moment".

This is exactly it. Why hasn't some expert group produced a very simple open design board with a simple Arduino-like IDE for FPGAs? Make it easy to access and use, get it into the hands of makers/hobbyists and watch the apps/ecosystem explode.

As an example, one could provide soft-cores for 8051/RISC-V etc. right out of the box with a menu of peripherals to mix and match. Provide a simple language library wrapper say over SystemVerilog (or whatever the community settles on) just like Arduino did (with C++) that makes it "easy" to program the FPGA.

For apps, one good example would be putting TinyML (or any other ML/LLM models) on a FPGA. This would take advantage of the current technology wave to make this project a success.

PS: Folks might find the book FPGAs for Software Programmers by Dirk Koch et al. (https://link.springer.com/book/10.1007/978-3-319-26408-0) useful.

[tverbeure]

The strong point of FPGAs is their versatility. If you wanted an FPGA that would be easy to put on a board, you’d have to drop support for multiple voltage rails and thus multiple IO standards, which is exactly what you don’t want to lose.

Building bitstreams is IMO not complicated. (I just copy a Makefile from a previous project and go from there.)

Loading them is a matter of plugging in a JTAG cable and typing “make program”.

I don’t know what you mean with the “manage SW projects for”?

[exmadscientist]

> you’d have to drop support for multiple voltage rails and thus multiple IO standards, which is exactly what you don’t want to lose.

Yes? Yes it is? 9 times out of 10, my entire board is LVCMOS33. I would love to have the option to drop all of the power rail complexity in a simplified series of parts.

Sometimes you need maximum I/O speed. Sometimes you need maximum I/O flexibility. Sometimes you need processing horsepower. And sometimes you need the certainty of hardware timing, which you get on a gate array and don't get any time there's a processor involved. Or, often, what I actually need is just a little bit of weird logic that's asynchronous, but too hard to do with the remnants of 74-series or 4000-series logic that are still available.

> Building bitstreams is IMO not complicated. (I just copy a Makefile from a previous project and go from there.)

It is not complicated for people who have spent a long time learning and who have past designs they can copy from. (I have a few of those myself.) It is nasty to explain to a new person and very nasty to explain well enough to reproduce in the future without me around.

> Loading them is a matter of plugging in a JTAG cable and typing “make program”.

Yes, for you on the bench. Now program them into a product on an assembly line. Of course it is possible. It is still a giant headache, and quite a bit worse than just dealing with an MCU.

> I don’t know what you mean with the “manage SW projects for”?

Two words: Xilinx ISE.

[exmadscientist]

> often, what I actually need is just a little bit of weird logic that's asynchronous

As a concrete example of this: two weeks ago I wanted a 21-input OR gate. It would have been wonderful if I could spend a little bit of money, buy a programmable thing in a 24-pin package, put it down, figure out some way to get the bitstream in (this is never pleasant in medium-volume manufacturing, so it's not like we're going to solve it now), and get my gate function that is literally one line of HDL. One. Line.

As it was, a 21-input OR gate is so much work in 74-series logic that I abandoned that whole thing and we did the bigger-picture job in a different, worse, way.

[summa_tech]

Would a SLG46880 work for you? It has 28 GPIOs, enough LUTs to make a 21-input OR gate, runs off 2.3-5.5V (two VCCIO partitions, but you can tie them together). It costs like a buck in 5k quantities - they used to be much cheaper when you bought them directly from Silego, but now that they've been acquired the price has been _improved_.

https://www.renesas.com/en/products/slg46880

[exmadscientist]

The Silego stuff has been really attractive at high volume. This is what I think about when some of the other posters in this thread sniff at my cost expectations: this stuff can get real cheap if you have volume behind it.

It was not a fit for this use case (on this product I am literally counting tenths of pennies, so, no go), and I dread dealing with Renesas in any form, but it's the right fit for something.

[tverbeure]

The device that you were looking was not an FPGA but a GAL22V10L.

[exmadscientist]

No, it wasn't. Those are mostly available in PLCC and DIP packages and even if you can get the SOIC/TSSOP versions they still cost $1.20 each at 10k volume. That's flat-out unacceptable for 99% of the things I do. The entire rest of the board I was talking about was $4.60. Processor included. $1.20 is not going to fly.

[tverbeure]

“Reduces use case and requirements to something impossibly niche and low volume then yells at the clouds.”

Anyway, just tie the output of 21 emitter followers together, add a resistor and - tadaaa - 21 input OR!

[tverbeure]

> sometimes … sometimes … sometimes …

And sometimes you need support for multiple IO standards.

I don’t understand what point you’re trying to get across.

But if all you need is LVCMOS33, why do you not use a MAX10 FPGA with built-in voltage regulator? Or a similar FPGA device from GoWin that is positioned as a MAX10 alternative? What is wrong with those?

> JTAG

On our production line, we use JTAG to program the FPGA? We literally used the same “make program” command for development and production. That was for production volumes considerably larger than 100k.

> ISE

ISE was end of life’d when I started using FPGAs professionally. That was in 2012. The only reason it still exists is because some hold-outs are still using Spartan 6.

[exmadscientist]

> I don’t understand what point you’re trying to get across.

My point is twofold:

1. There are many niches. Your main needs are not the same as my main needs. And my needs are poorly met by existing products, so I want to see something better. (And I do buy chips.)

2. All of this is way, way harder than it needs to be. It could be easy, but it isn't. Everything is possible right now. But I wasn't random when I used the dreaded A-word ("Arduino"). Arduino is a kind of horrible product that did not make anything possible and did not really invent anything. It did not make anything really hard suddenly become easy. Hard things before Arduino were still hard after Arduino. It "just" made some things that used to be medium-hard pains-in-the-butt actually really quick and easy (at a little backend complexity cost: now you've got the Arduino IDE around, hope it doesn't break!).

It turns out that is very valuable.

And is what I would like to see happen with FPGAs: make them easy to drop in instead of pains in the butt. All pieces for this exist, nothing is new tech, no major revolutions need to happen. "Just" ease of use.

[PunchyHamster]

> It did not make anything really hard suddenly become easy.

It did. Onboarding people onto embedded programmer.

You just ran it, wrote few lines and you had working blinky. Write some more and you have useful toy. You could even technically make products with it but going from this to C++ was easier coz you already know what you could do, just needed to go thru pain of switching the toolchain once you're already invested.

Compare that to "you need to setup compiler, toolchain, SDK, figure out how to program the resulting binary, map the registers to your devboard pins etc."

[exmadscientist]

Ah, but that's only medium hard on my difficulty scale ;)

[15155]

> make them easy to drop in instead of pains in the butt

How much easier does it need to be than putting down a single 1mm^2 LDO and a QFN IC? Is this really that difficult?

[ErroneousBosh]

> (at a little backend complexity cost: now you've got the Arduino IDE around, hope it doesn't break!)

Doesn't really matter if it does break; just use gcc and a Makefile like you would for any other firmware.

You probably want to replace the Arduino libraries with your own ones eventually anyway, because there's so much cruft in there that you're never going to use.

[15155]

> and quite a bit worse than just dealing with an MCU.

Unless you're using some kind of USB DFU mode (which is annoying on assembly lines), SWD-based flashing of an MCU is substantially more complicated than the JTAG sequences that some internal-flash FPGAs use for programming..

These chips are just as easy or easier to program than any ARM MCU. Raw SPI NOR flash isn't "easy" to program if you've never done it before, either.

[exmadscientist]

It's mostly the whole "two binaries" problem.

Oh look, the factory screwed up and isn't flashing the MCU this week! Does the board survive?

Oh look, the factory screwed up and isn't flashing the PLD this week! Does the board survive?

Oh look, the factory... wait, what is the factory doing and why are they putting that sticker on that....

You get the idea. Yes, yes, it is all solvable. I have never claimed it isn't. I am just claiming it is a giant pain in the ass and limits use of these things. I will bend over backwards to keep boards at one binary that needs to be loaded.

[15155]

Embed the bitstream into your MCU firmware binary, bitbang the 50-100KB bitstream into SRAM via JTAG from your MCU in all of 10ms. This is <100 lines of Rust.

[exmadscientist]

Yes, it's solvable. But my whole argument is that the entire experience is death by a thousand cuts. I'm not seeing how "it's possible in 100 lines of Rust" (a language most people don't even use for embedded work) is really countering my argument.

[tverbeure]

I honestly start to wonder how in the world we survived flashing 3 different binaries, for years (bitstream, 2 MCUs), without ever getting a complaint from the production floor.

I should check my spam folder.

[timthorn]

Sounds like a PLD might suit your usecase? Simpler than an FPGA, programmed like an EEPROM, perfect for glue logic.

[javawizard]

I wish CPLDs were more well known in the common vernacular.

The industry draws a distinction between CPLDs and FPGAs, and rightly so, but most "Arduino-level" hobbyists think "I want something I can program so that it acts like such-and-such a circuit, I know, I need an FPGA!" when what they probably want is what the professional world would call a CPLD - and the distinction in terminology between the two does more to confuse than to clarify.

I don't know how to fix this; it'd be lovely if the two followed convergent paths, with FPGAs gaining on-board storage and the line between them blurring. Or maybe we need a common term that encompasses both. ("Programmable logic device" is technically that, but no-one knows that.)

Anyway. CPLDs are neat.

[tverbeure]

I don’t see how CPLDs solve anything?

You write RTL for them just like you do for FPGAs, you need to configure them as well. The only major benefit is that they don’t have a delay between power up and logic active? But that’s not something that would make a difference for most people.

CPLDs are also a dying breed and being replaced with FPGAs that have parallel on-board flash to allow fast configuration after power up. (e.g. MAX10)

[bee_rider]

I don’t know anything about this (other than doing mediocre in some undergrad Verilog classes one million years ago). Wikipedia seems to call FPGAs a type of PLD. Of course, everybody has heard of FPGAs; is it right to think they’ve sort of branched off, become their own thing, and eclipsed their superset?

[exmadscientist]

"Programmed like an EEPROM" is part of the problem, any system that needs more than one piece of firmware to be wrangled during the assembly/bringup process is asking for pain.

But, really, no one cares what's inside the box. CPLD or FPGA, they're all about the same. The available PLDs are still not really acceptable. There's a bunch of 5V dinosaurs that the manufacturers would obviously love to axe, and a few tiny little micro-BGA things where you've got to be buying 100k to even submit a documentation bug report. Not much for stuff in the middle.

[fennecbutt]

It's basically because they're so locked down, hard to get docs, stupid toolchains and ides like others have mentioned.

It's like fpga companies don't want people using them, much like others like the pixart sensor I wanted to use: NDA because some parasite dipshit executive or manager thinks that register layouts are extremely sensitive information.

I've had dozens of uses for an fpga...but every single time I just can't be bothered. Why, when they make it a pain in the ass on purpose.

[15155]

None of these things are true for the new, cheap Chinese contenders.

[15155]

> they're complicated to put down on boards

https://gowinsemi.com/en/product/detail/46/

- Requires just 1V2 + 3V3

- Available in QFN

- Bitstream is saved in internal flash or programmed to SRAM via a basic JTAG sequence

https://www.efinixinc.com/products-trion.html

[exmadscientist]

> Contact Sales

> Request Sample

> Please login to download the document.

I mean, yeah. My argument isn't that anything is impossible. My argument is that all of this is harder than it needs to be and this is not countering me!

[15155]

This is your job, and it really shouldn't feel difficult. This is really not tedious: the minimum board design for these chips literally consists of just power, JTAG pins, and a clock (if the internal oscillator isn't good enough.)

The Gowin FPGAs are available (at a massive premium) from Mouser, just like whatever MCU you are already using. Many are available for <$1-2 in China. Efinix are available from DigiKey, with some SKUs under <$10.

All of the Gowin documentation is available on their site with a free, approval-less email login and no NDA, or via Google directly (PDFs, just like Xilinx, even numbered similarly.)

[mschuster91]

> All of the Gowin documentation is available on their site with a free, approval-less email login

The problem is trust. I'm hesitant to hand out my e-mail anywhere because far too often I have been hounded by salespeople as a result, not to mention data breaches or bombardment of newsletters.

[15155]

So just use Google to obtain the documentation? Or a fake email? The PDFs are pretty easily obtainable by title:

https://www.google.com/search?q=gowin+user+guide+filetype%3A...

https://www.google.com/search?q=gowin+primitives+filetype%3A...

https://www.google.com/search?q=gowin+gw1n+filetype%3Apdf

[mschuster91]

If I really need something I'll go that route, yes. But for something that is just on a "cool, that might be interesting" it's too much effort.

[pclmulqdq]

The Altera Max 10 devices are also relatively simple to support (flash on the chip, few power rails, etc.)

[PunchyHamster]

They can't, by nature of the proprietary bitstream. Arduino was only built thanks to ability to do whatever they wanted with open source compilers