[izacus]

We call it "cache" don't we these days? And they've become massive - Apple M series and AMX Strix series have 24/32MB of L3 cache.

This is where a lot of their performance comes from.

[protimewaster]

Is the cache on M series and Strix under control of the programmer? I was under the impression those were traditional caches and thus automatically handled by the hardware.

[izacus]

*AMD, obviously I meant AMD, not AMX :)