[LoganDark]

> I don't understand what the difference is between "an ARM chip with native x86 translation" and a dual-ISA x86 and ARM chip.

Look at Apple's Rosetta 2 for an example. M-series Apple Silicon has special undocumented modes that mirror x86 architectural quirks that don't usually exist in ARM, in order to support AOT-translated machine code. The chip doesn't support x86 instructions, but it has the amenities to support x86 code. That could be what "native x86 translation" meant?

[mort96]

That's what I suggested in my comment's last paragraph. I don't think that counts as "an ARM chip with native x86 translation", but really the only person who can say whether that's what dlojudice meant is dlojudice.

[cromka]

And why wouldn’t Intel be capable of doing the same?

[LoganDark]

I never said that?