[hakfoo]

The address space didn't have to start at 0. In fact, address 0 contains interrupt vectors. I suspect most of the CP/M compatibility was about starting at specific addresses within a given segment (isn't that why .COM executables are placed at 0x100?)

I blame Intel by having the boot address at FFFF0. That guarantees you need ROM at the top of memory rather than loading boot code and sticking frame buffers in low memory, and starting user RAM at like 0x20000.