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by bangaladore
320 days ago
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The general advice is 5 mils Intra-Pair and no specific requirement for Inter-Pair. These follow the same engineering guidelines as PCIe 4.0, with identical impedance and coupling. As far as I can tell, there are no significant differences, aside from PCIe 5.0 having smaller theoretical margins. Even then, the 5 mils spec is likely overkill for both. From what I’ve read, a well-designed PCB that supports PCIe 4.0 should also meet PCIe 5.0 requirements electrically and for signaling. I suspect the issue may be related more to power delivery or EMC than to trace layout or stack-up. Alternatively, it could just be an AMD policy decision to limit PCIe 5.0 support on this chipset variant, rather than a design flaw. |
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Power delivery shouldn't be an issue, the slot power limits haven't changed afaik, max is 75W for an x16 card since the beginning.