[DonHopkins]

I has having lunch with some hardware designers from SGI and Sun, and the SGI people mentioned jokingly that the MIPS could be both big-endian and little-endian, which they called SPIM. Then they pointed out much to the embarrassment of the Sun people (including me at the time) that the little-endian version of the SPARC would be called CRAPS.

[jecel]

SPIM was the name of a MIPS32 simulator widely used in computer science research at one point:

https://spimsimulator.sourceforge.net/

RISC-V looks a lot more like MIPS than it does RISC-I to IV, so on the technical side having MIPS-the-company abandon MIPS-the-architecture was not such a huge change. And DLX that the Hennessy and Patterson books used before they were changed to RISC-V was essentially MIPS as well.

[GianFabien]

Perhaps I'm mistaken. But I thought that several of the original MIPS designers, etc became the leaders of the RISC-V movement.

The ISA and its implementation are two different dimensions. Look at the x86 ISA how it evolved from 80386 to present day superscalar, predictive, re-ordered, who knows what else microprogrammed implementations. The code I compiled back in 1990 runs today without even recompiling it. My sleek light-weight laptop is totally unlike the beige box I originally compiled it on.

[jecel]

By original MIPS designers do you mean from Stanford? Those would include John L. Hennessy, Norman P. Jouppi, Steven Przybylski and Christopher Rowen as the authors of the first papers about the project. If you are talking about the MIPS company started by John Hennessy and Chris Rowen, Wikipedia has this list:

https://en.wikipedia.org/wiki/MIPS_Technologies#Notable_Cont...

In either case, I am not aware of any of them being RISC-V leaders though John Hennessy did rewrite the books he co-authored from DLX to RISC-V.