[TheOtherHobbes]

The article says the Bellmac-32 was single-cycle CISC. The VAX was very CISC and very definitely not single cycle.

It would have been good to know more about why the chip failed. There's a mention of NCR, who had their own NCR/32 chips, which leaned more to emulations of the System/370. So perhaps it was orders from management and not so much a technical failure.

[kimi]

I don't think it was single-cycle, someone mentions a STRCPY instruction that would be quite hard to do single-cycle....

[Tuna-Fish]

Single-cycle doesn't mean that everything is single cycle, but that the simple basic instructions are. As a rule of thumb, if you can add two registers together in a single cycle, it's a single-cycle architecture.