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by Clamchop
402 days ago
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The article is a touch confusing, but I'm pretty sure I agree that they meant the 640 kilobyte limit of the OG PC architecture. The Pentium II dates from 1997, the NV1 to 1995, and the new PCI bus with its whopping 32-bits to 1992. 640MiB would have been a prodigious amount of memory at the time of launch. I don't think any mathematical relationship between the address bus and either 640KiB or 640MiB was intended, it was just the anchor point for how huge 4GiB of addressing was viewed at the time. The article then goes on to say that the NV1 used 23 bits of the address bus but adds in the next paragraph that 16 bits remained to use for data. That math isn't working out for me. Actually, I'm really struggling to understand how this scheme would work at all. It strongly implies open addressing with no other MMIO devices to conflict with, but that's just not how I thought PCI worked. Maybe someone who knows more can explain it to me. |
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The whole thing a bit ironic since Bill Gates took great pains to say he never said 640KiB is all you need (or something like that). Given my example of the IBM PC/AT it definitely was not common understanding of upper limits in 1995 apocryphal or not.