[Sesse__]

I don't know if AMD allows more or fewer _situations_, but empirically, I'm seeing a lot of total cycles lost to this on Zen 2 and 3, and much less on the Intel CPUs I've been testing (mostly Skylake derivatives and Alder Lake).

I haven't tested Zen 4 or 5, but I haven't heard anything that indicates they should be a lot better.

[cwzwarich]

Interesting! IIRC, the LLVM passes dedicated to dodging this issue were contributed by Intel engineers, so maybe there’s some bias.