[fryd_w]

The flea-scope's hybrid FPGA/MCU architecture for USB streaming is clever - using FPGA pipelining to handle 100MS/s capture paired with an STM32 for protocol translation is sweet cost-wise. BUT, the 8-bit ADC resolution and lack of input protection networks (compared to Rigol's 1MΩ//20pF frontends with overvoltage clamping) make it risky in case of unattenuated signals.

The Python analysis toolkit using NumPy/SciPy for FFTs instead of baked-in DSP shows cool resource partitioning - could see Jupyter soon.

[picture]

I'm wondering if we looked at the same document... there is no FPGA and it is PIC32MK0512GPK064 instead of STM32. It's also 12 bits at nowhere near 100 Msps, being only 18 Msps.

Did you use the aid from AI to write the comment, or are you referring to another device?

[jesperwe]

The specs say 12 bit though.