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by Ductapemaster
497 days ago
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On your note about capacitor sizes — at my first EE job, my boss taught me about capacitance-voltage derating[0] for ceramic capacitors and it was quite the revelation. There is a significant inverse relationship between the two, which no one tells you about in college! I'm now very careful to pick ceramic capacitors with enough headroom on their rated voltage as you lose a lot if you're close to the rated value. This curve is dependent on the different ceramic types as well (C0G, X7R, etc). Cheaper ceramics have a steeper rolloff. For personal projects I am very careful to pick higher quality ceramics (X7R if I can) and use caps rated to 2-3x my operating voltage. Likely overkill, but I'm not optimizing for cost at volume. [0] https://resources.altium.com/p/voltage-derating-ceramic-capa... |
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If you don't believe me, poke around a bit in SimSurfing or similar. You should also notice that most capacitors are actually binned by voltage rating these days: a 16V part and a 50V part might be identically specified, but one's curves just cut off at 16V. I don't know if that's strictly binning or just testing, but it's pretty clear they're the same parts under the hood.