[brucehoult]

> Soft CPUs cost a few thousands gates

SeRV implements RV32I and uses 125 LUTs in Artix-7, 198 LUTs in iCE40, 239 LUTs in Cyclone 10LP. Plus 164 FF in each case. Or, apparently, 2.1kGE in CMOS.

Being bit-serial, instructions take either 32 or 64 cycles, vs 3 or 4 for many of the other small RISC-V cores, but it will run at whatever Fmax the rest of your design does, and it's often plenty fast enough.

There's also now QeRV, with the same basic design but with a 4 bit datapath: 3x faster for 15% larger size.