This is done before the SFP+ module sees the signal, but the module makes the design assumption that it is being done. It is right for 10G ethernet, it is wrong (at a certain time scale) for SPDIF.
In 10G ethernet phy's, it's a multiplicative (self-synchronizing) scramblers [1] and does not use line code. From what I remember, it's statistically fine, and plays into LDPC correction easier.
I also think that https://en.wikipedia.org/wiki/Line_code is the term you're looking for.