[tavianator]

SHL suffers from the same latency issue as SHLX it turns out

[loeg]

SAL as well? (And anyway this example seems to be shifting by the low 8 bits of RCX (CL), not the full width register.)

[tavianator]

SAL and SHL are synonyms, they have the same encoding. SHL only accepts CL as the count register, there's no other form that takes a variable shift count

[loeg]

Ahh, thanks, I didn't make that connection.

[Bulat_Ziganshin]

Intel shifts anyway mask out higher bits of CL, this hurts sometimes e.g. when you need to shift by 1..64 bits