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by abelsson 543 days ago
It’s also running on a microcontroller with a few hundred kb of memory so even win16 or macOS classic would be a bit heavy.
3 comments

> so even win16 or macOS classic would be a bit heavy.

Speed-wise, both would run exceptionally well on that hardware.

The first Mac had 128kB memory, about 32 of which were taken by its video and audio buffers. It ran at about 8MHz.

The first version of Windows ran on similar hardware, requiring a 8088 and 256kB of memory.

The pico has at least that amount of memory, at top speed 16 times the clock frequency, and two cores.

The Pico doesn't have an external memory bus, but something like MacOS Classic for an STM32 with a chunk of SDRAM and VGAish video would be fun.
The Pico 1 (i.e. the RP2040) doesn't. The Pico 2 (RP2350) does, albeit a fair bit slower (since it's QSPI PSRAM) than the internal SRAM.
The RP2040 has a single QSPI controller channel, but with clever hacks you can multiplex that to boot from SPI and switch over to some other (Q)SPI peripheral, but iirc you can't write directly (can be emulated via MPU+DMA). What's also quite neat is that you can use the external flash cache as 16kiB SRAM tiled repeatedly over a 16MiB memory window. By abusing the MPU you can allow/trap accesses down to 256 byte granularity and implement virtual memory (allow only one alias address at a time, treat the 16kiB SRAM as a direct mapped cache, and demand page from QSPI, other SRAM banks, or whatever you can come up with).
> The Pico doesn't have an external memory bus

I may be misunderstanding what you are saying here but if I read this correctly, you are wrong.

The project to run Transputer code on the Pi Pico uses a memory expansion for the original Pi Pico. I described it here:

https://www.theregister.com/2022/05/06/pi_pico_transputer_co...

Impressive work! Of course you can access external RAM, but it comes with some compromises re: speed and usability. Other ARM microcontrollers have a full SDRAM controller on board in its normal address space with very little overhead compared to the internal memory. I'd imagine the SPI RAM here is an order of magnitude slower than the internal RAM, if not two?

edit - that is one WILD codebase... it has both pi pico support but also (remnants of)... Mac OS 9 support!? `#ifdef __MWERKS__`??

Oh, yes, it's a crazy project overall. I would love to see it continue -- I think the Transputer and its OS HeliOS, which is FOSS now -- still has much to teach. But he got it working, so I can also see why not stop digging if you hit the bottom.

P.S. I wrote about HeliOS too:

https://www.theregister.com/2021/12/06/heliosng/

Well the RP2040 has a QSPI controller but it has only a single channel that is normally the "boot device". If you bootstrap via SWD (or USB) this device could be at least a QSPI RAM, but writes would have to trapped and implemented in the HardFault handler which is of course very slow compared to internal SRAM. The RP2350 adds a second QSPI channel with QSPI bus (just an additional chip select pin).
TBH I don't know the details of how it works. I am not at all an electronics person. But did you read the article? All I'm saying is that it is possible to add more RAM to a Pi Pico. That, to me, seems to falsify the statement that it can't.
Not everything needs to run directly from RAM.