[drpixie]

What's with giving error rates as a count of bits, when it's not clear how much DRAM was tested? There's a comment that the error was around 50% but the graphs should be error percentage, not some (meaningless) absolute number!

And there was an interesting feature - error rates didn't seem to change linearly with time, but (strongly for DDR4 and less so for DDR5) the error rate changes in intervals of 8 seconds. That's very much unexpected, so needs a good explanation or indicates a likely error in their procedure.

[Almondsetat]

I agree that absolute numbers are a bit strange, but the article states exactly which model of memory was used, namely a W-NM56S508G SODIMM for DDR5 and a KF432C16BB/4 DIMM for DDR4, not to mention the most important part is measuring their different performance between generations

[JoachimSchipper]

The error rate is given per bit, not per second, i.e. every few bars represents a distinct DRAM chip. That makes some sense, and the article explains quite well why DRAM would behave like that... but I agree that I had to read the article at least twice to figure out that the x-axis on the graph represents the lower bit of the address line!

Still, it's nice to have at least some modern data; https://www.usenix.org/legacy/event/sec08/tech/full_papers/h... is awesome and has much more extensive measurements, but machines from 2007 are somewhat less relevant today.