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by pokeymcsnatch 571 days ago
Voltage spikes from line inductance, voltage drop-outs from line resistance. Basically you have little reservoirs of charge scattered all around the board (current flow isn't instantaneous in a real circuit).

It helps to always think of current draw in a compete loop, out the "top" of the capacitor, through your IC, and back into the ground side (this isn't necessarily what's happening physically). Shorter loop means less inductance, shorter traces less resistance.

1 comments

Thanks, that makes no sense to me :)

But I do recall having had inductance issues with high frequency transfers to an atmega.

I have no idea how a capacitor would help. Sounds like it would increase a signal delay (tiny one perhaps).

But definitely interesting, I'll need to learn about this if/when I dive further into electronics.

Decoupling can be used on signal lines, but we’re talking about power lines here. If you have something like an ATMega, it will change its power demands very frequently at high frequencies due to switching signals on and off. Without some additional capacitance on the board, the inductance will dominate at high frequencies. Inductance resists change in current, and you’ll get voltage drops.

Capacitance is in many ways the opposite of inductance. If you place capacitors close to the power sink (e.g. the ATMega), the traces will have lower inductance and be “decoupled” from the power supply.