[wyager]

For a lot of the iCE40 chips, it's extremely difficult to reliably get fMax > 50MHz even with extremely aggressive pipelining. I assume 80MHz is only possible on the highest-speed parts in the iCE40 family

I switched a design from iCE40 to ECP5 and got a ~3x speedup "for free"

Agreed that using Lattice FPGAs is super nice, mostly because you get to use the open-source Yosys toolchain, which is vastly better than proprietary toolchains IMO