[schmidtleonard]

The trillion-dollar-hard part is doing it profitably at scale. Drop that constraint and nearly any feature size is "only" million-dollar-hard (maybe 10M or 100M to run a R&D shop).

You can poke and prod anything into place with e-beams and FIBs and manually dipping wafers in baths and ovens and such. 1% yield, hour long write times, and all sorts of R&D jank are perfectly fine for checking functionality of your fancy ultra-FET design or making a ring oscillator to simulate integration. Did a grain of dust land on the wafer and ruin 100 of them? No prob, use the other 300, just try not to let it happen again. But integrating a billion transistors, coordinating them to do a billion calculations per second, QAing them to work for a billion seconds with 0 errors, and manufacturing them to profitably sell at $100 a pop? No jank allowed, no small scale antics allowed, and your budget now requires all the zeros it can find and more besides.