[ArchOversight]

It doesn't implement some x86 in hardware, it implements some memory ordering guarantees in hardware to match what x86 requires.

However that is a very minor implementation, there is no actual x86 in Apple's ARM.

https://www.sciencedirect.com/science/article/pii/S138376212...

TSO could be implemented by other ARM processors easily as well, to provide the same memory ordering guarantees. Besides that the x86 code is translated by Rosetta to ARM instructions.

[wmf]

Besides TSO there are a bunch of ARM extensions designed to match x86 behavior. https://dougallj.wordpress.com/2022/11/09/why-is-rosetta-2-f... I'm curious whether Oryon and X925 implement these instructions and whether other emulators like FEX use them.

[sqeaky]

He didn't say it implemented any instructions, I would argue that the memory ordering is quite important and part of why other CPU architectures can sometimes be faster or more efficient than x86, it takes effort to guarantee atomicity and apparent read and write ordering. And when a CPU was expending effort that means either transistors or time.

[Findecanor]

Apple also implements a couple x86 CPU status register flags not present in AArch64.