[eric__cartman]

> Performance varied between a 4.3 percent slowdown to a 2.3 percent speedup depending on the way it was bent.

I have practically zero knowledge on the physics behind semiconductors to try to think why this could occur but I find it fascinating nonetheless.

[dragontamer]

My expectation is that the core clock circuit has its capacitance and/or inductance change, this changing the timing of the clock.

+/-5% is a region where everything in the digital domain probably still works. Your rise/fall time and dead-time / other critical timings need to be robust against some degree of variability. Transistors can have rather wide manufacturing variability after all (certainly wider than 5%).

So everything still works but the core clock is changing. Which btw, happens in traditional silicon circuits as they heat up or cool down.

A low precision RC oscillator changing by 5% or so between 20C and 100C is within expectations. I'm fact, a -50%/+100% change wouldn't surprise me.

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Old var-caps (variable capacitors) by twisting them tighter or looser. No joke. So that's where my expectation that they've changed the capacitance of some core element that controls an important clock.

[adrian_b]

Many resistive materials, especially those that are semiconductors, have changes of resistivity caused by mechanical strain.

This so-called piezoresistive effect is frequently used for measuring the deformations of various objects, by attaching piezoresistive wires to them, which can measure for instance the amount of bending of the object.

Such a flexible integrated circuit might also have changes in the resistance of the transistor channels or of the interconnection traces, which will change the maximum permissible clock frequency. If an RC oscillator is used to generate a clock signal, its frequency will change with the bending of the circuit, more likely due to variations of the resistance than of the capacitance, because it is not likely for the bending to cause large variations in the thickness of the dielectric of the capacitors or in the area of the electrodes, even if that is also possible.

The variable capacitors whose capacitance is changed by twisting have this behavior because their electrodes overlap only partially and the twisting changes the area of the overlapping region. No such thing happens when twisting or bending a normal capacitor.

[dragontamer]

> which will change the maximum permissible clock frequency.

Emphasis on _permissible_ clock frequency. Because how is the core logic supposed to figure out how much the clock frequency changed or how much the resistance of the wires have changed?

> because it is not likely for the bending to cause large variations in the thickness of the dielectric of the capacitors or in the area of the electrodes, even if that is also possible.

Yes but no. Everything you said is correct, but you're looking at the wrong dielectric. The plastic PCB is obviously unchanging, even as it gets balled up.

However, there's another dielectric here that's normally ignored that suddenly becomes relevant. The _relevant_ dielectric (to this discussion) is the air. As the capacitor rolls up into a cylinder shape, the copper-air-copper capacitor has the dielectric (air) get thinner-and-thinner.

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However, to your point that this is "resistance"... the fact that "rolling one way" leads to -speed and "rolling the other way" leads to +speed suggests that its a resistance issue. Because the spring/resistance relationship is known. So stress/tension causes resistance of copper to grow, while pressure causes resistance of copper to drop.

If the oscillator is an RC-type oscillator (ex: a 555-timer like oscillator), then yes, I can see the resistance theory playing out. And 60kHz is slow enough that RC-type oscillators are possible.

[adrian_b]

> Because how is the core logic supposed to figure out how much the clock frequency changed

It is frequent for such logic circuits to use clock generators made with a so-called ring oscillator, i.e. with a chain of inverters containing an odd number of them, which is connected in a loop. The clock period will be a multiple of the delay through a logic inverter.

In this case the actual clock frequency tracks exactly all changes in the permissible clock frequency, regardless of their causes, including temperature and mechanical deformation.

> As the capacitor rolls up into a cylinder shape, the copper-air-copper capacitor has the dielectric (air) get thinner-and-thinner.

I am not sure which is the copper-air-copper capacitor to which you refer. On a PCB, there are parasitic copper-air-copper capacitors between traces, but they have very little influence on clock frequencies. On a normal integrated circuit, there is no air. The metal layers are separated by insulator layers and the top metal is covered by a passivation layer. This flexible circuit should also be covered by some passivation layer.

Replacing in your argument the copper-air-copper capacitor with a copper-insulator-copper capacitor, any circuit has two kinds of capacitors, those that are made intentionally, with two overlapped metal electrodes and a very thin insulator layer between them, and the parasitic capacitors that exist between any metal traces.

Your argument is valid for the parasitic capacitors, because the distance between traces will vary with bending and some parasitic capacitors will become larger, while others will become smaller. The effect of each of the parasitic capacitors on the permissible clock frequency is small and the global effect of all parasitic capacitors is unpredictable without a concrete circuit layout, because their changes with the bending may compensate each other.

For an intentional capacitor, the effect mentioned by you also exists, but in most technologies for integrated circuits the thickness of the insulator of the capacitors is very small in comparison with the lengths and widths of the electrodes. In this case only a very small part of the electromagnetic field is outside the internal space of the capacitor and its influence on the value of the capacitance is negligible. Perhaps the capacitors made with this flexible technology are not as thin in comparison with their area as in other technologies, in which case the effect mentioned by you could be measurable, but I doubt it.

[crest]

Neither do I, but I can tell you if you manage to bend a normal CPU die the performance loss is 100% (because you broke it).