[arder]

The Altera merger was a perfect storm. I could write for pages about what went wrong. But here's a few key things: First FPGA companies have been massively hit and miss with their product - they were perfectly capable of screwing up their next chip all on their own (it's a mutually beneficial duolopy of crapness with Xilinx). Second, when Altera agreed to fab with Intel the deal was written such that Intel could never buy any FPGA company other than Altera, so from day 1 this wasn't "Let's produce this together" it was "Let's line up Intel to buy Altera" and so Altera never had to deliver anything, they just had to wait for the acquisition. Third, Altera were one of Intel's first customers and it turns out that Intel's fab process couldn't make some of the gates that Altera needed, which is why in the end they partitioned off the entirety of the transcievers to a separate tile fab'd by TSMC and sellotaped to the edge of the Stratix 10.

Also just to check your facts on the 10nm fab problems. Intel's first FPGA for Altera was always planned to be 14nm. It was totally trash for reasons entirely within Altera's control (don't rock the boat, just wait for the acquisition to close). And the synergistic products were a dead end. I'm sure the 10nm catastrophe didn't help but really that time would've been well spent unpicking the disaster of Stratix 10.

[jhallenworld]

Oh right, 14 nm.. it was so long ago now :-)

Also I assume that both AMD and Intel bought FPGA companies for FPGA co-processor acceleration opportunities. I don't think this has panned out.. I know Microsoft has their bing FPGA accelerator, but I don't think FPGAs have made any dent in the AI space, and are certainly not essential in any of the hyperscalers. Maybe AMD will sell Xilinx at some point.

>they partitioned off the entirety of the transceivers to a separate tile fab'd by TSMC and sellotaped to the edge of the Stratix 10

awesome.. I could imagine it was too risky to redesign the transceivers.