[coder543]

https://x.com/wren6991/status/1821582405188350417

Supposedly it didn’t require any measurable amount of additional die space, because other things constrained the minimum size of the die (like the I/O pads), according to one of the Raspberry Pi engineers.

An additional ARM core would have required significant changes to the crossbar. Right now, only two cores can be active, not three.

[sand500]

Does that mean the RISC-V cores are super low powered?

[coder543]

It just means that the die already had to be large enough to physically fit the number of pin pads that they wanted to have. It doesn’t really say anything about the RISC-V cores. They could be big or small. But these do seem to be almost as powerful as the ARM cores, based on what people have said. (I still want to see more benchmarks.)