[elipsitz]

Can’t find an official announcement or datasheet yet, but according to this post:

* 2x Cortex-M33F * improved DMA * more and improved PIO * external PSRAM support * variants with internal flash (2MB) and 80 pins (!) * 512KiB ram (double) * some RISC-V cores? Low power maybe?

Looks like a significant jump over the RP2040!

[dave78]

Pico 2, using the 2350, seems to be announced:

https://www.raspberrypi.com/products/raspberry-pi-pico-2/

[jsheard]

Only $1 more than the original Pico, that's an absolute steal. Although the Pico2 doesn't have PSRAM onboard so there's room for higher end RP235x boards above it.

[HeyLaughingBoy]

Make one in an Arduino Uno form factor and double the price and they'd make a killing :-)

I try to dissuade n00bs from starting their arduino journey with the ancient AVR-based devices, but a lot of the peripherals expect to plug into an Uno.

[ta988]

Look at the adafruit metro then. They just announced the rp2350 version

[moffkalast]

Well there's the UNO-R4 Renasas I suppose, but this would be much cooler indeed. There's also the 2040 Connect in the Nano form factor with the extra IMU.

[dgacmu]

Small (0.5 bits effective) improvement to the ADC also, per the datasheet.

[repelsteeltje]

... And RP2354A/B even has 2MB built in flash!

[andylinpersonal]

Indeed an in-package winbond flash die though.

[jacobmarble]

Please explain. What is a better alternative that could have been chosen?

I’m just happy to have one fewer component on my boards.

[jercos]

Downside is it occupies a CS on the QSPI controller, presumably bonding to the same pads as the QSPI pins on the package, so now you only have one external memory IC. It's a very small tradeoff all things considered, but is still technically a tiny disadvantage over highly integrated MCUs.

A potential alternative would have been a directly memory-mapped NOR flash die, but that would have required more bond wires, more dedicated pads on the die, a port on the bus, and on top of that the memory die would have been more expensive too.

An older (and often impractical) alternative is to use a single die with both flash and SoC on, in the same process. This usually forces a larger-than-desired process node to match the flash technology, making the SoC take up more space. The result requires no extra bond wires or pads, but now you're really manufacturing a flash chip with an MCU attached.

[KaiserPro]

I'm hoping that its got much better power management. That would be really cool for me.

[zrail]

This is pretty exciting. Can't wait for the datasheet!