[DHaldane]

I've found the same thing - a little syntax example, some counter examples and generative AI does well generating syntactically correct code for PCB design.

A lot of the netlists are electrically nonsense when it's doing synthesis for me. Have you found otherwise?

[seveibar]

Netlists, footprint diagrams, constraint diagrams etc. are mostly nonsense. I’m working on finetuning Phi3 and I’m hopeful it’ll get better. I’m also working on synthesized datasets and mini-DSLs to make that tuning possible eg https://text-to-footprint.tscircuit.com

My impression is that synthetic datasets and finetuning will basically completely solve the problem, but eventually it’ll be available in general purpose models- so it’s not clear if its worth it to build a dedicated model.

Overall the article’s analysis is great. I’m very optimistic that this will be solved in the next 2 years.