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by xoranth
733 days ago
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> That allows things like individual threads to take locks, which is a pretty big leap. Does anyone know how those get translated into SIMD instructions. Like, how do you do a CAS loop for each lane where each lane can individually succeed or fail?
What happens if the lanes point to the same location? |
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There seems to some more detail in a Bachelors thesis by Phillip Grote[2], with lots of measurements of different synchronization primitives, but it doesn't go too deep into the hardware.
[1]: https://arxiv.org/abs/2205.11659
[2]: https://www.clemenslutz.com/pdfs/bsc_thesis_phillip_grote.pd...