Kind of cheating trick for the QFN substrate pad is to put a grid of somewhat higher diameter vias in there and solder the pad from the other side of the board through these vias. Another approach is to just ignore the substrate pad altogether (in many devices it should not be connected to anything anyway and has no real thermal management purpose).
I have in fact seen the via trick used for 50mil pitch BGAs, but cannot remember where. I even vaguely recollect some board where that was used for CGA, which seems like really ridiculous idea (you don't use CGA packages and then invent some weird kludge pseudo-process).