[Farfignoggen]

ISAs are not the hardware as the hardware is made up of Instruction Decoders and a micro-op engine and other parts that's implemented in the hardware and that is someone's bespoke design that's engineered to execute that ISA. So ISAs are just execution templates that are created to implement a standard execution model and standard encodings with rules that are to be followed by whoever has designed the hardware to execute that ISA(Standard).

The RISC-V ISA is just another standard with a multitude of different ways, in hardware, for someone to implement that ISA. The RISC-V ISA is only special in that it's License Free to use that RISC-V ISA and so no money has to change hands or no royalties have to get paid to utilize the RISC-V ISA/standard. And the RISC-V ISA has no limitations on any set/subset of Instructions that the end user must implement and so that's popular for making Micro-controllers that are never going to be used for any general purpose computing anyways.

There needs to be some Legal definition of just where the ISA ends and the Micro-Architecture begins as that's the de-marking line there as to where the Standard ends and someone's hardware implementation begins. Because on Modern Micro-Processors the ISA instructions/encodings get broken down into Micro-Ops and it's the Micro-ops that are actually what the micro-op engines are executing to get that work done.

I'm sure ARM Holdings does not like RISC-V as that's not good for their ISA Licensing business model but RISC-V is not going to be easily stopped as how easy is it to realistically stop some standardized way of doing things. The only thing that can get restricted is the actual hardware implementations that are engineered to execute the RISC-V ISA if those are created in the US/EU/"West" but that's never going to stop anyone from creating their own bespoke hardware that implements the RISC-V ISA Standard. Impossible to do that for any ISA that's implemented for internal use only.