[bobmcnamara]

IIRC, they have 128bit alignment requirements, so tricky to autovectorize.

[bitbank]

True - load and store mask off the bottom 4 bits of the address. They try to help the situation by including an instruction which can shift a pair of 128-bit registers by bytes.

[bobmcnamara]

That sounds really familiar. Maybe Altivec did that? I remember it did something like that but I wish that it would just fault.