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by dragontamer
833 days ago
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> The idea is that, instead of being a bunch of gates like an FPGA, the components of the CGRA are at the scale of an ALU, or maybe an on-silicon network switch, with a single CGRA having different parts that are optimized for e.g. numerics, IO, encryption, caching, etc., which you can knit together into the processor you need. What the other guy said downthread, but seriously. Xilinx FPGAs today do have LUTs (the 4-input or 6-input gate-like structures). But they also have VLIW + SIMD cores with L1 connected on powerful interconnect. https://www.xilinx.com/products/technology/ai-engine.html So CGRAs is probably "just" a modern Xilinx "AI Engine" FPGA. ------------------- Major FPGAs for the last 10+ years have all had hardware multipliers as well. Multiplication is just one of those ASIC / hardware units that LUTs cannot emulate very well. Depending on your definition of "Coarse-grained reconfigurable arrays", you might want to look into DSP-slices and other "ALU-like" subunits of FPGAs of the last decade. |
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